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You will verify ASIC design implementation, develop verification infrastructure, optimize verification flows, and collaborate with teams on advanced methodologies.

As a Senior ASIC Design Engineer, you'll implement high-performance RTL, analyze architectural trade-offs, and collaborate across teams to deliver cutting-edge designs.

Drive AI-enabled ASIC development methodology by identifying cross-stage bottlenecks, building data pipelines and metrics, creating automation and AI models, mentoring engineers, and evaluating advances in AI and EDA to improve predictability, convergence, and cycle time.

As a Senior Formal Verification Engineer, you will verify ASICs using formal methods, collaborate multi-functionally, lead methodology enhancements, and mentor junior engineers while ensuring compliance and correctness.