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The Senior Staff Engineer will design and validate high-performance RF/Analog circuits, specifically Transimpedance Amplifiers and various analog circuits, collaborating across teams to ensure successful production.

Responsible for the design and validation of FET and BiCMOS circuits for high-speed broadband ICs and optical interface chips. Collaborate on post-silicon validation and transition to mass production.

The Staff Firmware Engineer will design, implement, and optimize SSD firmware features, perform failure analysis, and collaborate across teams to ensure effective firmware development and deployment.

Develop architecture for verification environments, write test plans, develop tests, debug issues, and verify software tools for multi-core SoCs.

The Sr. Staff Engineer will verify AI/HPC systems, develop test strategies, and create complex verification environments, collaborating on SoC methodologies.

As an Analog Layout Staff Engineer, you'll run simulations, collaborate on designs, and lead in the development of precision analog circuits, ensuring projects meet specifications through teamwork and iterative debugging.

The Staff Design Verification Engineer will verify digital circuits in high-speed communication ICs, develop verification plans, and collaborate across teams for ASIC design.

As a Senior Staff Engineer, you will enhance digital design flows for high-performance SerDes IP, optimize automation frameworks, collaborate on IP development, and support EDA integration, all while leveraging AI/ML techniques in a Linux environment.

The Principal Timing Engineer will focus on post RTL design flow, including synthesis, timing closure, and DFT for SerDes IPs, collaborating with design teams to deliver successful solutions.

The role involves leading the design and evaluation of analog mixed-signal circuits, collaborating with cross-functional teams, and improving project execution processes.