Top Tech Jobs & Startup Jobs in Toronto

Develop and maintain design verification tests and infrastructure for System Management Controllers in chiplet-based, multi-chip SoCs. Create and execute test plans, develop C/C++ tests for direct DUT execution, and triage and debug hardware/software issues with design and architecture teams. The role also involves SystemVerilog, SV-UVM, Python, co-simulation, advanced interconnect standards, and AI-assisted verification tools.

Own university and early-career recruiting strategy for a site, including school selection, campus partnerships, events, sourcing, screening, interview coordination, offers, and closing. Manage intern, co-op, and new-grad hiring funnels while partnering with engineering managers to define candidate profiles and maintain hiring standards. Build new-grad recruiting processes, track funnel metrics in the ATS, and improve candidate experience and recruiting outcomes through data-driven decisions.

Lead manufacturing cost accounting including inventory, fixed assets, and COGS. Build and scale standard costing, cost roll-ups, and controls for IPO readiness. Analyze manufacturing variances, partner with Supply Chain, Sales, and R&D, and deliver COGS and margin reporting to leadership.

Lead and scale global IT: own enterprise systems, infrastructure, security partnerships, end-user experience, and IT operations. Drive strategy, roadmaps for business applications, integrations, automation, and internal service delivery while partnering with cross-functional leaders to support rapid AI hardware and software growth.

Own multi-layer PCB layouts for high-performance AI and computing products. Route high-speed interfaces (GDDR/LPDDR/DDR, PCIe Gen5/6, Ethernet, USB), apply layout rules, select advanced fabrication (HDI, blind/buried vias, back drilling, VIPPO), collaborate with power, SI, and mechanical teams, and resolve DFM/DFA/DFT feedback to meet manufacturability and regulatory standards.

The Risc-V Architect will analyze AI workloads, design custom RISC-V cores, and lead the architecture efforts at Tenstorrent, improving CPU performance.

Develop and optimize low-level infrastructure software that interfaces with Tenstorrent hardware. Build libraries and APIs for inter-node communication and synchronization, improve performance and scalability in distributed environments, support hardware bring-up, testing, deployment, and integrate components with runtimes and programming models.

Lead post-silicon debug and bring-up for AI accelerator platforms, diagnosing hardware and firmware failures across chips, boards, and systems. Drive root-cause analysis for power, thermal, memory, high-speed links, PCIe and NoC issues; build debug tools, automation, and methodologies; collaborate with ASIC, firmware, and software teams to resolve complex system-level problems and improve reliability.

As a Power Architect at Tenstorrent, you'll drive architectural strategy to optimize power across AI compute systems, using advanced estimation tools and modeling techniques.

Own end-to-end physical implementation of AI accelerator and RISC-V IP blocks from synthesis through PnR, timing closure, and GDSII signoff. Drive PPA outcomes, collaborate with RTL owners, build floorplans, power grids, pin placement and clocking strategies, and deliver LEF/DEF, timing and power models, GDS, and signoff reports for tapeouts on advanced nodes.