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The Staff/Sr Staff ASIC Engineer will lead static timing analysis and synthesis for complex ASIC designs, collaborate with design teams, optimize performance, resolve equivalence issues, maintain timing constraints, and interface with cross-functional teams. The role requires expertise in RTL design, power optimization, and knowledge of EDA tools.

The Sr. DFT Engineer will develop and maintain DFT methodologies across various business units, architect flows for RTL-centric DFT environments, automate verification tests, and lead a team of DFT engineers to achieve company goals.

The Staff Firmware Engineer will develop and test embedded firmware, working on both pre-silicon and post-silicon environments. Responsibilities include developing firmware for embedded Risc-V cores, collaborating with design teams, supporting customers, and mentoring junior team members.