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Alphawave IP, Inc.

Sr. DFT Engineer

Reposted 21 Days Ago
Be an Early Applicant
In-Office
Toronto, ON, CAN
Senior level
In-Office
Toronto, ON, CAN
Senior level
As a Senior DFT Engineer, you'll develop and maintain DFT methodologies, create automated verification, and lead DFT engineers.
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The Opportunity


We're looking for the Wavemakers of tomorrow.

Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology.

Alphawave SEMI is looking for Sr DFT engineers for our DFT methodology group.

What you'll Do

  • Acting as a member of Alphawave central DFT methodology group responsible for developing, maintaining and supporting flows across all company business units and projects
  • Architecting methodologies and flows for an integrated, RTL centric "shift left" DFT environment across company IPs, chiplets and SoC designs.
  • Developing automated verification test bench and sequence creation for DFT IP. Architecting end-2-end verification solutions from static design checks, through formal and sequence-based verification.
  • Building IP/block and SoC level scan insertion flows and scripting ATPG retargeting procedures. Creating automated QoR checks for implementation quality control.
  • Writing static timing constraints, creating waivers and devising flows for bullet proof timing checks
  • Hiring, training and leading DFT engineers in day-to-day tasks and activities to fulfill company road map.

What You'll Need:

  • Bachelor's degree in engineering science, Electrical and Computer Engineering or Computer Science
  • 5+ years of experience in complex SoC designs in RTL, DFT or FE capacity. Candidates with less experience may be considered for other senior technical roles.
  • Vast experience to various DFT EDA tools from Tessent, SNPS and Cadence
  • Good knowledge and understanding in Verilog/VHDL and SystemVerilog
  • Exposure with CAD and automation. Good exposure for using de-Perl techniques in creating generic codes. Knowledge of TCL and Python is a plus.
  • Extensively experienced with main DFT standards such as JTAG (1149.1/1149.6/1500), iJTAG (1687) and BIST techniques (memory BIST, logic BIST, interconnect BISTs)
  • Track record in integrating custom made DFT logic for complex SoCs (System-On-Chip) and CoWoS (Chip-On-Wafer-On-Substrate) designs is highly desirable.
  • Experience in SoC and IP/Block level scan insertion and ATPG, simulation of zero delay and SDF annotated test sequences.
  • Experience in core wrapping, pattern retargeting & packetizing ATPG techniques. SSN knowledge is a plus.
  • Experience in scripting/reviewing SCAN/MBIST timing constraints.
  • Developing DFT rule bases and DFT-DRC checks with spyglass are valuable additions.

"Hybrid work environment"

As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes:

  • Great Compensation Package
  • Health Insurance
  • Retirement Savings
  • Paid Time Off

Diversity & Inclusivity

Alphawave Semi is based out of one of the most diverse countries in the world. This includes differences related to race, ethnicity, national origin, gender, gender expression and presentation, sexual orientation, religion, age, ability and socioeconomic status. To us, diversity is one our strongest assets to our organization. We commit ourselves to promoting the recognition and appreciation of our diverse and rich culture. We believe that it is critical to our success to promote freedom of thought and opinion in a respectful environment. The decisions we make are rooted by respectfully considering each other’s thoughts and opinions and by working towards a greater common goal.

Accommodation

Alphawave Semi is an equal opportunity employer and welcomes applications from all qualified individuals, including visible minorities, Indigenous People, and persons with disabilities. We welcome and encourage applications from people with disabilities. If as a qualified job applicant, you request accommodation, Alphawave Semi will consult with you to provide reasonable accommodations according to your specific needs. If you wish to make a request, you will be provided an opportunity if you’re applications is selected to proceed in our hiring process.

Top Skills

Cadence
Dft Methodology
Python
Rtl
Snps
Systemverilog
Tcl
Tessent
Verilog
Vhdl
HQ

Alphawave IP, Inc. Toronto, Ontario, CAN Office

70 University Ave, 10th Floor, Toronto, Ontario, Canada, M5J 2M4

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