The role involves driving backend processes in physical design, optimizing PPA, performing verification, and addressing power integrity issues with a focus on collaboration and detail.

Design and develop embedded firmware and SDKs for connectivity SoCs, collaborating with teams and ensuring firmware quality through testing and debugging.

As a Staff Application Engineer at Alphawave Semi, you'll provide first-line technical support, develop APIs, and improve customer experience, requiring extensive lab equipment and programming expertise.

The role involves end-to-end verification of designs, developing plans, building testbenches, analyzing test failures, and supporting validation activities across multiple programs.

As a Senior DFT Engineer, you'll develop and maintain DFT methodologies, create automated verification, and lead DFT engineers.

Design and develop microarchitecture and RTL for SoC subsystems, collaborate with various teams for successful tapeout, and ensure quality and performance.

Lead and mentor a software engineering team, architect automation frameworks, establish CI/CD pipelines, and enhance software development processes for silicon tools and infrastructure.

Acting as part of DFT methodology at Alphawave, the role involves architecting DFT methodologies, automating RTL, and developing verification solutions for SoC designs.

Lead the embedded firmware team in delivering high-performance SerDes PHY solutions, defining architecture, coordinating cross-functional efforts, and resolving complex issues throughout product lifecycle.

Responsible for planning and tracking SoC semiconductor product engineering, improving workflows, coordinating cross-functional teams, and managing project schedules.

The Principal DFT Engineer develops and supports DFT methodologies, architects RTL-centric systems, and automates verification processes for SoC and IP designs.

Lead the firmware and software development for high-speed SerDes PHYs, managing a team of engineers and ensuring project success through lifecycle ownership.

The Senior Analog Design Engineer will develop and optimize analog blocks for high-speed data communication circuits, focusing on performance, power, and area. Responsibilities include circuit design, verification, layout oversight, and collaboration with other teams for product characterization.

Lead design SoC verification for connectivity networking products, collaborating with cross-functional teams and improving verification methodologies.

As a Senior SI/PI Engineer, you'll design and optimize high-speed interconnects, conducting simulations and validation to ensure signal and power integrity in various systems.

The Senior Technical Solutions Manager will prepare and present technical solutions, lead customer engagements, negotiate technical documents, and communicate customer needs to the marketing team, while requiring some travel.

As a Senior STA & Timing Methodology Engineer, you will own sign-off for complex ASICs, set timing methodologies, automate processes, and lead a team while improving methodologies with AI integrations.

As a Custom Layout Engineer, you'll design ultra-high-speed circuits, work on advanced semiconductor nodes, collaborate with analog design teams, and automate layout software.

Lead the software and firmware development lifecycle for chiplet platforms, managing complex programs and cross-functional engineering efforts, ensuring timely delivery and quality. Responsible for metrics, risk management, and team coordination.

Lead firmware development for UCIe chiplet portfolio, collaborate with teams on validation, optimize design, and mentor engineers.