Top Tech Jobs & Startup Jobs in Toronto

As a Senior Mask Layout Design Engineer at NVIDIA, you'll collaborate with various engineering teams to perform physical layouts for mixed-signal functions in sub-micron CMOS technologies, utilizing Cadence tools. Your responsibilities include floor planning, custom layout, design rule verification, and interacting with foundries, as well as debugging and customizing DRC and LVS flows.

The Senior Signal and Power Integrity Engineer will design high-frequency channels, create layout guidelines, simulate components, and conduct lab measurements. They will master technology related to InfiniBand, Ethernet, and PCI-Ex while working closely with engineering teams.

The Senior Memory Controller Verification Engineer will define verification scope, develop test infrastructures, collaborate with design teams, ensure code coverage, and assist with post-silicon debug. The role involves working on memory controller designs and verification methodologies.