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The Design Engineer will develop logic design and RTL coding for SoC design, integrate IP blocks, and ensure design verification. Collaborate on architecture features and perform quality checks while addressing security practices.

The Senior Pre-Silicon Verification Engineer will develop verification strategies for mixed-signal designs, execute plans, and collaborate with teams to ensure functional compliance before fabrication.

The Senior Verification Engineer will lead ASIC design verification efforts, develop verification strategies, create test plans, and mentor junior engineers while ensuring coverage compliance.

The role involves mixed-signal design engineering focusing on timing analysis, circuit design using Cadence ADE, and verification methodologies.

Validate SerDes technologies, ensure mixed signal designs meet reliability and performance standards, drive innovation and collaborate on validation strategies.

Design and develop analog circuits for high-speed SerDes applications, optimizing performance, testing designs, and mentoring engineers. Collaborate across teams to ensure designs meet specifications and drive technical direction.

Lead design and validation of analog circuits for high-speed SerDes applications, guiding junior engineers, and collaborating across functions. Requires extensive experience in analog/mixed-signal design.