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Design and verify high-speed analog and mixed-signal circuits (PLL, DLL, ADC, SerDes, CDR, TX/RX, regulators, amplifiers). Perform SPICE/Spectre/MATLAB simulations, post-layout verification, pre-tapeout validation, lab chip bring-up and debugging, and collaborate with layout, verification, and applications teams to deliver analog IP to production.

Serve as primary HR leader for Marvell's GTA sites, partnering with leaders on workforce planning, employee relations, compliance, onboarding, training, investigations, engagement, and HR operations to align people strategies with business goals.

The Senior Staff Engineer will design and validate high-performance RF/Analog circuits, specifically Transimpedance Amplifiers and various analog circuits, collaborating across teams to ensure successful production.

Responsible for the design and validation of FET and BiCMOS circuits for high-speed broadband ICs and optical interface chips. Collaborate on post-silicon validation and transition to mass production.

The Sr. Staff Engineer will verify AI/HPC systems, develop test strategies, and create complex verification environments, collaborating on SoC methodologies.

The Staff Design Verification Engineer will verify digital circuits in high-speed communication ICs, develop verification plans, and collaborate across teams for ASIC design.

As a Senior Staff Engineer, you will enhance digital design flows for high-performance SerDes IP, optimize automation frameworks, collaborate on IP development, and support EDA integration, all while leveraging AI/ML techniques in a Linux environment.