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The ASIC Design Engineer will define micro-architecture, implement low-power RTL designs, collaborate on verification plans, and support silicon bring-up.

This role involves designing and validating high-performance RF and Analog circuits for TIAs, utilizing advanced SiGe and CMOS technologies, and supporting production transition and post-silicon evaluation.

The role involves ASIC design, focusing on post-RTL design flow including synthesis, timing closure, DFT support, and collaboration with design teams for SerDes IP solutions.

The Staff Firmware Engineer will design, implement, and optimize SSD firmware features, perform failure analysis, and collaborate across teams to ensure effective firmware development and deployment.

Support the analog design team with circuit implementation for various blocks, assist in design verification, collaborate with different teams, and participate in debugging activities under senior guidance.

Design and develop micro-architecture for complex ASIC products, implement low-power designs, and collaborate with various teams on verification and support.

The Principal ASIC Design Engineer will design hardware for datacenter and AI SOCs, define micro-architecture, implement RTL designs, and collaborate across teams on various technical aspects and verification.

Design high-speed optical transceivers and manage analog IP delivery. Responsibilities include circuit design, verification, and collaboration with teams.

As a Senior Staff Engineer in Analog Layout, you will run simulations, collaborate across global teams, and deliver analog circuits through the full development cycle, ensuring high standards and effective communication.