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The Performance Engineer - Inference will optimize model inference speed and throughput, debug low-level kernel performance, and develop tools to visualize performance data.

Lead post-silicon bring-up and optimization of wafer-scale engines: develop debug flows, HW-SW codesign optimizations, build large-scale test infrastructure, create self-checking metrics and instrumentation, and collaborate across silicon, performance, and software teams to improve production performance and release processes.

Design and implement system-level debugging, validation, and observability platforms. Build automated anomaly detection, visualization and analysis tools, and frameworks for failure classification and regression detection. Extend compilers, runtimes, and instrumentation for advanced profiling. Improve bring-up and low-level debug workflows, partner cross-functionally across hardware, firmware, compiler and runtime teams, lead high-impact initiatives, and support incident response and long-term corrective actions.

Lead post-silicon bring-up and performance optimizations for Cerebras Wafer Scale Engines. Develop/debug production-ready flows, instrumentation, and self-checking metrics. Build infrastructure for large-scale silicon workload testing, collaborate with silicon architects, performance and software teams, and streamline CI/CD and release workflows.

Design and architect front-end network fabrics for AI/ML and HPC clusters. Automate deployment of network infrastructure, debug networking issues, and lead technical projects across teams.

The R&D Engineer will design and implement performance workloads on Cerebras' wafer-scale hardware, collaborating across teams to advance AI and scientific computing. Responsibilities include optimizing performance models, contributing to the technology roadmap, and publishing research findings.

Join the Kernel Reliability team to improve the reliability of compute clusters, assist in debugging, and enhance system tools alongside hardware teams.

Join the SOTA Training Platform team to bring up ML models on Cerebras systems, enhancing performance across the software stack and debugging issues.

Design, implement, optimize, and validate high-performance ML and linear algebra kernels for Cerebras hardware. Develop low-level assembly and CSL routines, measure and tune performance, build testing methodologies, and collaborate with chip and system architects to maximize compute utilization for AI and HPC workloads.

Join the Inference Core Model Bringup team to bring up ML models on Cerebras CSX systems, focusing on performance, optimization, and debugging.