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Ciena

Senior Digital Verification Engineer (ASIC - Client IP/Ethernet)

Reposted 12 Days Ago
Be an Early Applicant
In-Office
2 Locations
Senior level
In-Office
2 Locations
Senior level
As a Senior Digital Verification Engineer, you will create verification strategies, validate functional blocks, and collaborate with systems engineers in the telecommunications industry.
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As the global leader in high-speed connectivity, Ciena is committed to a people-first approach. Our teams enjoy a culture focused on prioritizing a flexible work environment that empowers individual growth, well-being, and belonging. We’re a technology company that leads with our humanity—driving our business priorities alongside meaningful social, community, and societal impact.

How You Will Contribute as a Senior Digital Verification Engineer:

 

The Wavelogic family of products are widely used in Ciena's optical fiber transmission solutions, and are one of the main contributors to Ciena's success in the telecommunications industry. To further strengthen our team, we are looking for an enthusiastic digital verification engineer who will be involved in the verification of these products, working within a team of digital design engineers, verification engineers and architects. Your role as a senior digital verification engineer will be to propose and implement innovative verification strategies, in order to thoroughly simulate and validate functional blocks and subsystems for the Wavelogic family of products based out of Pittsford, New York office.

 

  • As a senior digital verification engineer, you are expected to read and understand the architecture and functional requirements specification document(s) and communicate and collaborate with systems engineers and architects

  • You are held responsible for the complete and thorough validation of one or more architectural functional blocks by using an appropriate combination of simulation, formal and coverage methods

  • You are expected the create the verification, functional coverage and formal verification test plans

  • You are accountable for the creation of testbench environment and/or components, agents, scoreboard, and all test scenarios related to your architectural functional block using System Verilog UVM and/or C where applicable

  • You will perform coverage driven verification, monitor regressions and debug resulting failures with the help of the function's designer

  • You are expected to report on status updates on a regular basis

 

The Must Haves:

  • Electrical or computer engineering, computer science or other applicable scientific degree at the BEng/BSc or MEng/MSc level

  • A highly motivated self-starter, able to work independently, while being a team player

  • Ability to methodically solve complex technical problems

  • Excellent organization, written and oral (English) communication skills

  • Proficiency above the intermediate level with the use of System Verilog, SVA, and simulators from major vendors.

  • Proven ability in determining appropriate and comprehensive digital verification and coverage strategies

 

The Assets:

  • Experience with UVM.

  • Experience with formal verification methods

  • Experience in DSP and/or Forward Error Correction

  • Experience with mixed-signal design validation

  • Experience with standards and protocols such as OTN, B100G, Ethernet

  • Experience with using Jira for bug tracking and GIT for source code management and revision tracking

  • Familiarity with programming languages such as: Python, Make, bash, object-oriented programming, C, C++, System C

Pay Range:

The annual pay range for this position in New York is $119,900 - $191,500 USD.

The annual pay range for this position in Ottawa is $109,000 - $174,000 CAD.

#LI-BH

Pay ranges at Ciena are designed to accommodate variations in knowledge, skills, experience, market conditions, and locations, reflecting our diverse products, industries, and lines of business. Please note that the pay range information provided in this posting pertains specifically to the primary location, which is the top location listed in case multiple locations are available.

Non-Sales employees may be eligible for a discretionary incentive bonus, while Sales employees may be eligible for a sales commission. In addition to competitive compensation, Ciena offers a comprehensive benefits package, including medical, dental, and vision plans, participation in 401(K) (USA) & DCPP (Canada) with company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company-paid holidays, paid sick leave, and vacation time. We also comply with all applicable laws regarding Paid Family Leave and other leaves of absence.

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At Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard.  Ciena values the diversity of its workforce and respects its employees as individuals. We do not tolerate any form of discrimination.

Ciena is an Equal Opportunity Employer, including disability and protected veteran status.

If contacted in relation to a job opportunity, please advise Ciena of any accommodation measures you may require.

Top Skills

Bash
C
C++
Dsp
Ethernet
Make
Python
Sva
System Verilog
Uvm

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