Lightmatter is leading the revolution in AI data center infrastructure, enabling the next giant leaps in human progress. The company invented the world’s first 3D-stacked photonics engine, Passage™, capable of connecting thousands to millions of processors at the speed of light in extreme-scale data centers for the most advanced AI and HPC workloads.
Lightmatter raised $400 million in its Series D round, reaching a valuation of $4.4 billion. We will continue to accelerate the development of data center photonics and grow every department at Lightmatter!
If you're passionate about tackling complex challenges, making an impact, and being an expert in your craft, join our team of brilliant scientists, engineers, and accomplished industry leaders.
Lightmatter is (re)inventing the future of computing with light!
As a Design Verification Engineer at Lightmatter, you will find yourself at the heart of a dynamic, interdisciplinary team. Your role will involve close collaboration with our digital design experts, using UVM testbench techniques to rigorously verify their designs. Your responsibilities will include working alongside photonic and analog designers, gaining a deep understanding of their innovative designs, and applying Real Number Modeling (RNM) and AMS verification methods. This critical function ensures the integrity of their work. We are hiring Design Verification Engineers at multiple levels.
Your interaction with the Architecture team will be crucial in comprehending system requirements and spearheading performance verification. This role offers a unique platform to enhance your skills across a spectrum of areas including UVM, AMS modeling, mixed-signal verification, formal verification, emulation, and both performance modeling and verification.
Responsibilities- Collaborate closely with digital, photonics, and analog designers to gain a thorough understanding of their designs and formulate comprehensive test plans for verifying their work.
- Create UVM test benches for subsystem-level verification and provide support for full-chip verification. Debug test benches, identify and address issues, achieve high coverage, and ultimately sign off on Design Verification (DV).
- Develop Real Number Models (RNM) for photonics and analog Intellectual Properties (IPs) and conduct AMS verification to ensure accurate model representation. Integrate the RNM models seamlessly into the UVM test bench.
- Play a key role in the development of the Golden Reference Model (GRM) for design verification and actively participate in running emulations and formal verification for DV purposes.
- Master's degree or higher in Electrical or Computer Engineering (or other related fields)
- 1-5 years of industry experience in Design Verification
- Proficiency in Hardware Description Languages (HDL) such as SystemVerilog
- Knowledge of verification methodologies such as UVM or OVM
- Proficiency in using simulation tools like Xcelium, ModelSim, Questa, or VCS
- Experience with Scripting Languages (Perl or Python)
- Fluency in English, both written and verbal
- Ability to work with diverse teams of engineers and scientists
- Experience with AMS verification
- Experience in formal verification
This role is posted for two levels:
Design Verification: $107,000 - $121,000 CAD
Sr Design Verification: $123,000 - $150,000 CAD
We offer competitive compensation. The base salary range for this role determined based on location, experience, educational background, and market data.
- Comprehensive Health Care Plan (Medical, Dental & Vision)
- Retirement Savings Matching Program
- Life Insurance (Basic, Voluntary & AD&D)
- Generous Time Off (Vacation, Sick & Public Holidays)
- Paid Family Leave
- Short Term & Long Term Disability
- Training & Development
- Commuter Benefits
- Flexible, hybrid workplace model
- Equity grants (applicable to full-time employees)
Benefits eligibility may vary depending on your employment status and location. Lightmatter recruits, employs, trains, compensates, and promotes regardless of race, religion, color, national origin, sex, disability, age, veteran status, and other protected status as required by applicable law.
Export Control
Candidates should have capacity to comply with the federally mandated requirements of U.S. export control laws.
