Search the 20 jobs at Marvell Technology

The Staff Engineer in Analog Layout will design and optimize analog mixed-signal layouts, work with circuit designers to meet specifications, and ensure that layouts comply with design rules. Responsibilities include floor planning, custom layout, verification, and maintaining documentation of methodologies and decisions.

The Analog Mixed Signal Design Engineer will work with a team on architectural investigations and implementation of circuits like PLL, DLL, ADC, and regulators. Responsibilities include design verification using tools like SPICE and Spectre while collaborating with layout and verification teams, and managing the delivery of analog IP from concept to production.

The Principal Analog Mixed Signal Design Engineer will work on designing high-speed and optical transceivers, focusing on circuits like PLLs, DLLs, ADCs, and amplifiers. Responsibilities include ensuring performance targets, design verification using tools like SPICE and MATLAB, and managing the delivery of analog IP from concept to production, collaborating with layout and verification teams.

The role involves architectural investigations and implementation of circuits like PLL, DLL, ADC, and amplifiers, ensuring performance targets are met. The candidate will design and verify analog IP and interface with various teams to bring designs from concept to production.

Responsible for establishing and maintaining interconnect Signal Integrity (SI) and Power Integrity (PI) design rules for Marvell COMPHY, D2D, DDR, and other analog misc. IP. Collaborate with cross-functional teams, conduct simulations, develop design rules, release SI/PI models, and provide technical support. Must have a Bachelor's degree in electrical engineering with 8+ years of experience or a Master's degree/PhD with 5+ years of experience.

Design Verification Principal Engineer role at Marvell involving verification of highly complex SoCs and multi SoC systems, developing verification environments, test plans, and tools, and collaborating with designers to ensure coverage goals are met.

Seeking a highly skilled Senior Staff Software Application Developer with 3-4 years of experience in AMS or analog IC design. Responsibilities include developing software design processes, collaborating with teams, utilizing scripting languages for automation, and contributing to logic design and implementation.

The Senior Engineer, Digital IC Design is responsible for developing behavior models of high-performance SerDes analog circuits for digital and system verification. Duties include creating accurate analog models in SystemVerilog, verifying model accuracy, documenting results, improving methodology, and collaborating with design teams for effective SerDes IP solutions.

As a Senior Engineer in Analog IC Design, you will design and improve transistor level circuits, utilizing CAD tools primarily Cadence. You will perform circuit analysis, simulations, and tests, iterating designs until they meet specifications. Collaboration with team members and attending design meetings is key to resolving issues and enhancing designs.

The Analog Mixed Signal IC Design Engineer will lead high-speed and high-performance SerDes development in advanced technology nodes, including 5nm and 3nm. Responsibilities include designing IP, collaborating with DSP and Analog teams, directing layout engineers, validating IP, and supporting product and customer needs.

As a Staff Engineer in Digital IC Design, you will design and verify digital circuits for high-speed communication ICs, enhance design methodology, and collaborate across teams to deliver competitive SerDes IP solutions. You will also be involved in RTL design, verification, synthesis, and timing analysis.

As a Staff Engineer in Design Verification, you will design, verify and evaluate digital circuits for high-speed data communication ICs, develop verification plans, set up test environments, and collaborate with cross-functional teams. You will improve design workflows and support product teams pre- and post-silicon.

The Senior Staff Firmware Engineer will design, develop, and verify new firmware features, participate in design reviews, and deliver documentation and source code. They will also collaborate on firmware development tasks including debugging and chip design simulations.

The Senior Staff Timing Engineer will focus on post RTL design flow, including synthesis, timing closure, and DFT generation for SerDes PHY solutions. Responsibilities involve collaborating with design teams, improving methodology, and providing support for product teams pre and post silicon.

As a Senior Staff Engineer in Digital IC Design, you will design, verify, and evaluate digital circuits for high-speed communication ICs. Responsibilities include writing engineering specifications, RTL design, synthesis, and timing analysis while collaborating with cross-functional teams to ensure successful product delivery.

The Senior Staff Engineer in Design Verification is responsible for verifying and evaluating digital circuits in high-speed data communication ICs. Tasks include developing verification plans, setting up test environments, and collaborating with teams to improve design methodology for competitive SerDes IP solutions.

The Senior Principal Analog IC Designer will lead a team in designing sophisticated CMOS transceiver and SERDES products. Responsibilities include overseeing architectural investigations, circuit designs, design verification, and managing the delivery of analog IP from concept to production. The role emphasizes collaboration with layout, verification, and application teams.

The Staff Engineer for Analog IC Design will contribute to the development of high-speed and high-performance SerDes, working with various analog circuitry and providing guidance to layout engineers. Responsibilities include design, characterization, lab debugging, and supporting customer needs.

The Staff Engineer will lead the development of high-speed SerDes and Analog Mixed-Signal IPs in advanced technology nodes. Responsibilities involve designing high performance circuitry, guiding layout engineers, working on IP characterization, and providing product and customer support.

The role involves leading a team of analog design engineers in designing CMOS transceiver, PLL, DLL, ADC, and amplifiers. Responsibilities include architectural investigation, design verification using industry-standard tools, interfacing with layout and application teams, and managing analog IP delivery from concept to production.