Teams at Lightmatter

Lead development of the internal photonics PDK: create Python-based pcells, build and verify compact behavioral models, automate parameter extraction from FDTD/FEM solvers, correlate models with lab measurements, implement CI/regression tests, and own netlist extraction and connectivity logic for circuit-level simulation.

Lead DFT insertion and ATPG for ASIC designs, perform post-silicon bring-up and ATE test program debug, script and automate DFT/ATPG flows, interface with physical design and RTL teams, and support synthesis through place-and-route timing closure and tape-out signoff.

Responsible for timing constraints development, STA and timing closure on CMOS technologies, driving timing sign-off, analyzing power/performance tradeoffs, and running full-chip STA.