Teams at Intel

Design and verify complex analog circuit layouts, perform microfloor planning and power/grid/ESD verification, troubleshoot tools and flows, and collaborate with circuit and structural teams to optimize area, power, reliability, and performance.

Design and implement offloading and SYCL infrastructure for Intel compilers. Develop binary formats, device code generation, and offloading models. Collaborate with LLVM/SYCL communities and internal compiler, runtime, and platform teams to deliver production-ready heterogeneous compute solutions for CPUs, GPUs, and accelerators.

Lead design and validation of analog circuits for high-speed SerDes applications, guiding junior engineers, and collaborating across functions. Requires extensive experience in analog/mixed-signal design.