Jobs at Astera Labs

The Technical Lead will design high-performance digital solutions, manage IP integration, ensure timing closure, and utilize design tools for connectivity solutions.

The Physical Design Manager will lead a team to implement connectivity ASICs, handling execution from RTL to GDSII, while ensuring design quality and mentoring engineers.

The role involves designing and verifying advanced node CMOS mixed-signal circuits, including PLLs, ADCs, and other analog components, while collaborating with global teams.

Design and verify advanced node CMOS products, including high-speed mixed-signal circuits. Collaborate across teams, manage lab chip debugging, and ensure timely delivery under pressure.

As a Principal Embedded Software Engineer, you'll lead firmware architecture and team building for analog connectivity solutions in AI infrastructure, ensuring software quality and effective collaboration with cross-functional teams.