Teams at Arm

Develop and execute verification strategies for sophisticated Arm SoCs and compute subsystems. Responsibilities include reviewing architecture, creating test plans, developing SystemVerilog and Verilog testbenches, debugging failures, verifying PCIe/CXL, DDRx/LPDDRx, and HBM subsystems, improving methodologies, and supporting project planning and junior engineers.

Support deployment, training, and support of internal SoC design and verification flows. Work with project engineers and methodology developers to ensure front-end and back-end flows function correctly, ramp teams, liaise with EDA vendors to resolve tooling issues, and identify efficiency improvements across engineering projects.

Lead architecture, design, and delivery of coherent and non-coherent SoC interconnect fabrics. Define system-level interconnect strategies (topology, QoS, latency, bandwidth, power), collaborate across CPU/GPU/NPU/memory teams, drive standards adoption, own performance modeling and RTL/verification strategy, lead debug/root-cause analysis, mentor engineers, and shape roadmaps for next-generation interconnect IP to support tape-out and silicon validation.