Lead a team in developing and optimizing the timing analysis engine for FPGA designs, ensuring high performance and efficiency. Foster software quality and enhance user experience for Quartus tool.

Develop and lead optimization algorithms for FPGA software, focusing on enhancing performance and efficiency in Quartus tool. Ideal candidates demonstrate research expertise and collaborative skills.

The FPGA Development Tools Engineer will create designs to offload compute to FPGA fabric, focusing on high-level synthesis and compiler optimizations. The role requires expertise in modern C++ and experience with the Open FPGA Stack and relevant design flows.

The role involves designing hardware and software for ML inference IP and compilers, focusing on FPGA development and optimizing performance.

The role involves leading the design and optimization of HLS compiler infrastructure, collaborating with teams to improve synthesis quality and performance, and mentoring junior members.

The Machine Learning Engineer will develop and optimize ML models for FPGA Compiler, collaborate with engineers, and enhance compiler performance using advanced ML technologies.

Architect and develop software innovations for Quartus, focusing on optimization algorithms for FPGA tools, enhancing routing and retiming capabilities.

Develop software for Quartus compiler, enhancing FPGA support, optimizing synthesis, facilitating interactions with customers, debugging, and implementing features.