The Software Engineer Intern will work on technical challenges, collaborate in teams, and develop engineering solutions using skills in C/C++ and Python.

The FPGA IP Design Engineer develops and verifies memory interface and chip-to-chip IP cores, working on advanced architectures, design implementation, and customer support.

The FPGA Development Tools Engineer will develop HLS compiler infrastructure, optimize high-level code for hardware, improve compilation flow, and implement code transformations.

Architect and develop software innovations for Quartus, focusing on optimization algorithms for FPGA tools, enhancing routing and retiming capabilities.

Develop software for Quartus compiler, enhancing FPGA support, optimizing synthesis, facilitating interactions with customers, debugging, and implementing features.

Lead a team in developing and optimizing the timing analysis engine for FPGA designs, ensuring high performance and efficiency. Foster software quality and enhance user experience for Quartus tool.

Join the Quartus Compiler Synthesis team to develop and optimize software for FPGA devices, improve synthesis flow, and enhance usability while collaborating with customers and cross-functional teams.

Develop and lead optimization algorithms for FPGA software, focusing on enhancing performance and efficiency in Quartus tool. Ideal candidates demonstrate research expertise and collaborative skills.

As an FPGA IP Design Engineer, you will develop and verify memory interface and transceiver-based IP cores, focusing on RTL development and CAD tool integration while providing customer support.

Develop and optimize software for Quartus compiler, focusing on FPGA device support, timing closure, and compiler optimizations. Requires strong C/C++ skills.

Develop and optimize hardware and software ML inference systems. Collaborate with teams to improve architectural decisions and trade-offs for performance optimization.