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Marvell Technology

Design Verification, Staff Engineer

Posted 10 Days Ago
Be an Early Applicant
Toronto, ON
Mid level
Toronto, ON
Mid level
Responsible for the design, verification, and evaluation of digital circuits in high-speed communication ICs. Tasks include developing verification plans, setting up test environments, executing test cases, and collaborating with various engineering teams.
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About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

Central Engineering AMS-IP team provides leading-edge SerDes PHY solutions and other Analog Mixed-Signal IPs to support all Marvell products.

What You Can Expect

  • As ASIC design verification engineer you will be responsible for the design, verification and evaluation of digital circuits in high-speed data communication ICs.
  • You will be involved in verification plan development, test environment setup, modeling, testcase development and execution.
  • Perform design verification for various SerDes IPs with data rates from 10Gbps to 224Gbps across different applications.
  • Utilize and enhance the UVM DV environment.
  • Improve design methodology and workflow for greater efficiency.
  • Collaborate with Analog, DSP, Digital Design, Firmware, and Application Engineering teams to deliver competitive SerDes IP solutions across product lines.
  • Provide support to product teams, both pre-silicon and post-silicon.

What We're Looking For

  • Bachelor’s degree in Computer Engineering, Electrical Engineering, or related fields with 4+ years of relevant experience, or a Master’s/PhD with 2+ years of relevant experience
  • Proficient in fundamental concepts of digital logic design
  • Knowledgeable in ASIC verification flows and methodologies
  • Skilled in Verilog, SystemVerilog, and UVM
  • Proficient in UNIX Shell scripting (Csh, Bash)
  • Experience with Verification IPs (VIPs)
  • Experience with formal verification techniques
  • Understanding of low power design principles
  • Knowledge of MATLAB and C/C++ system simulation and evaluation
  • Experience with DSP function hardware implementation
  • Strong skills in Perl and Python scripting
  • Excellent communication skills, team collaboration abilities, and a motivated attitude for contributing to a highly skilled design verification team.

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

#LI-AB1

Top Skills

C
C++
Perl
Python
Systemverilog
Verilog

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