Sr Staff Engineer, SOC Top/Debug Implementation

Posted 2 Days Ago
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Toronto, ON
Senior level
Hardware • Manufacturing
The Role
The SOC Top/Debug Implementation Engineer will own the debug solution for high-performance AI SOCs, working across cross-functional teams to define and implement top-level debug architectures, develop debug interfaces, and drive innovation in debug methodologies. They will assist in post-silicon validation and ensure system-level issues are identified and resolved.
Summary Generated by Built In

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

We are looking for a SOC Top/Debug Implementation Engineer who will take ownership of the debug solution and design across all chiplets in our high-performance AI SOC. This role involves working closely with cross-functional teams to implement and optimize top-level debug strategies that ensure seamless operation and post-silicon validation of the SOC.

This role is hybrid, based out of Toronto (ON), Ottawa (ON),  Boston (MA), or Austin (TX)

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.


Responsibilities:

  • Own and drive the debug solution and architecture across all chiplets within the SOC, from initial concept through to post-silicon bring-up and validation.
  • Define and implement top-level debug and trace architectures for high-performance SOCs, ensuring comprehensive visibility into SOC behavior and performance.
  • Work closely with cross-functional teams to define requirements for system-level debug features, including software and hardware integration.
  • Develop and implement debug interfaces, including JTAG, trace modules, and debug controllers, that enable detailed analysis and troubleshooting of SOC subsystems.
  • Collaborate with the design, verification, and post-silicon teams to ensure debug features are properly integrated and validated across all stages of development.
  • Optimize the debug infrastructure to minimize overhead and maximize performance while ensuring complete observability across the SOC.
  • Assist in post-silicon debug efforts, working closely with lab teams to bring up SOC designs and identify any system-level issues during validation.
  • Drive innovation in debug methodologies, ensuring that debug solutions are scalable, reusable, and robust across multiple product lines and generations of SOCs.
  • Support silicon bring-up, post-silicon validation, and manufacturing test efforts with debugging insights and solutions.


Experience & Qualifications:

  • BS/MS/PhD in EE/ECE/CE/CS or a related field with 5+ years of experience in SOC design and implementation, focusing on debug architecture.
  • Proven experience in SOC debug architecture design, including defining and implementing top-level debug and trace solutions for complex SOCs.
  • Strong knowledge of JTAG, trace modules, and debug controllers and experience working with industry-standard debug and test protocols.
  • Experience working across multiple chiplets in a large-scale SOC, with a focus on implementing debug solutions that span multiple subsystems.
  • Deep understanding of hardware design, verification, and post-silicon validation processes, with experience troubleshooting complex SOC designs in a lab environment.
  • Familiarity with RTL design using Verilog/VHDL 
  • Excellent problem-solving and debugging skills, with experience working across multiple design hierarchies and subsystems.
  • Strong interpersonal and communication skills, with the ability to collaborate effectively across cross-functional teams.
  • Experience with AI or high-performance computing SOCs is a plus.


Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set  by the U.S. government.

Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and/or documentation will be required and considered as Tenstorrent moves through the employment process.

If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government.  If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded.

Top Skills

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The Company
HQ: Toronto, ON
389 Employees
On-site Workplace
Year Founded: 2016

What We Do

Tenstorrent is a next-generation computing company that builds computers for AI.

Headquartered in Toronto, Canada, with U.S. offices in Austin, Texas, and Silicon Valley, and global offices in Belgrade and Bangalore, Tenstorrent brings together experts in the field of computer architecture, ASIC design, advanced systems, and neural network compilers.

Join us: www.tenstorrent.com/careers

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