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Marvell Technology

ASIC Design/Verification, Principal Engineer

Posted 6 Days Ago
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Kanata, ON
Senior level
Kanata, ON
Senior level
The Principal Engineer will lead a team developing ASIC products for data center, wireless, and automotive customers. Responsibilities include overseeing design and verification, writing specifications and test plans, designing RTL code, debugging issues, and collaborating with cross-functional teams.
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About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

Marvell''s Compute and Custom Solutions (CCS) BU is looking for an experienced ASIC design manager to join our growing team developing ASIC products for internal and external data center, wireless, and automotive customers. In this strategic role, you will oversee a talented group of ASIC design engineers focused on developing cutting-edge IP, subsystems, chiplets, and SOCs. If you are passionate about leading high-performance teams and driving the development of industry-leading technology solutions, we invite you to apply.

What You Can Expect

  • Work with Marvell engineers on the design or verification of an IP, subsystem, or SOC
  • Interact with internal and external customers
  • Write clear and concise technical specifications to document the behaviour of a design block or subsystem, or write appropriate test plans
  • Design RTL code in verilog and/or verification environments and test cases in UVM
  • Assist with RTL lint, block level assertions, code coverage closure, CDC, synthesis and timing closure.
  • Able to debug complex design issues using best practices
  • Help to write scripts as required
  • Write functional coverage items as required to verify a block or subsystem
  • Help monitor regressions and triage failures
  • Collaborate with cross-functional teams consisting of architects, designers, verification, physical design, and software/firmware engineers.
  • Strong customer focus with demonstrated attention to quality

What We're Looking For

  • Knowledge of semiconductor ASIC design/verification methodologies and flows
  • Extensive knowledge of Verilog/System Verilog/UVM
  • Strong programming skills including object-oriented programming
  • Knowledge of Ethernet and datapath cryptographic algorithms is an asset
  • Very good analysis, problem-solving, and critical thinking skills
  • Must have effective interpersonal, teamwork, and communication skills
  • Willing to work in ASIC design, or verification roles.
  • BS/MS degree in EE/CE or related technical field(s) is required
  • 10+ years of relevant experience

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Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

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Top Skills

System Verilog
Verilog

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