We are seeking talented software developers to join our device modeling team!
As part of our timing modeling and device mapping team, you'll be responsible for a range of key parts of the Altera FPGA flow. Our team bridges the gap between hardware and software and provides unique opportunities to experience the best of both worlds.
Your day-to-day job will consist of a variety of areas including advanced algorithm development, modeling support for new hardware features, and optimization to find the perfect tradeoff between model accuracy and the tight runtime & memory requirements of our Quartus Prime software.
You'll work closely with our hardware architects and designers as well as with the Quartus Prime Compiler organization to make sure that the hardware and software can work in tandem to maximize value to our customers.
Our compensation is designed to reflect the Canadian labour market. The actual salary offered may vary based on several factors, including the position’s location, as well as the candidate’s experience, skills, training, and job-specific knowledge. In addition to base salary, we offer performance-based incentive opportunities that reward both individual contributions and overall company success.
Estimated Salary Range: $98,900 – $143,300 CAD
We use artificial intelligence to screen, assess, or select applicants for the position. This posting is for an existing vacancy. Canadian work experience is not required for this role.
Qualifications:Bachelor’s (+4 years experience), or Master’s/Ph.D. (+2 years experience) in Electrical Engineering, Computer Engineering, Computer Science, or related discipline.
Strong proficiency in C++, with knowledge of HDL (Verilog/VHDL), and scripting languages (Python, Tcl).
Experience with timing analysis, static timing modeling, and timing verification methodologies a strong plus.
Understanding of FPGA architecture, digital logic design, and device physics.
Top Skills
Altera (altera.com) Toronto, Ontario, CAN Office
151 Bloor St W, Toronto, Ontario, Canada, M5S 1S4


