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ASIC Verification Intern

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In-Office or Remote
Hiring Remotely in Canada
Internship
In-Office or Remote
Hiring Remotely in Canada
Internship
As an ASIC Verification Intern, you'll verify digital designs, create test environments, write debugging scripts, and collaborate with engineering teams to ensure efficient silicon delivery.
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Position: ASIC Verification Intern
Date: September 8th - December 18th, 2026
Location: Onsite, Ottawa, ON, Canada
Education Recommendations:
Currently pursuing a Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.

As an ASIC Verification Intern, you will join our hardware engineering team and collaborate closely with experienced ASIC design and verification engineers to verify complex digital and System-on-Chip (SoC) designs that are integral to next-generation semiconductor products.

You will contribute to the creation of verification environments, automated test infrastructure, and advanced debugging methodologies, all aimed at ensuring the highest quality in silicon delivery. This internship will provide you with hands-on experience in industry-standard ASIC verification flows, exposure to cutting-edge simulation tools, programming environments, and modern verification methodologies.

Responsibilities

As part of the team, you will:

  • Execute test plans for ASIC verification.
  • Write and debug testbenches for RTL verification.
  • Create verification components, test cases, and regression suites.
  • Develop automation scripts for simulation, regression, and data analysis.
  • Debug simulation failures and analyze waveform results.
  • Collaborate with design, architecture, and validation teams.
  • Support continuous improvement of verification infrastructure and methodologies.
Qualifications

You're a great fit if you have:

  • Strong programming skills in C/C++.
  • Proficiency in Python.
  • Experience with scripting languages such as Shell, Perl, or Tcl.
  • Basic understanding of digital design and computer architecture.
  • Familiarity with RTL design concepts and HDL languages like Verilog/SystemVerilog.
  • Strong analytical and debugging skills.
  • Good communication and teamwork abilities.

It would be nice if you also had:

  • Exposure to ASIC/SoC verification methodologies such as UVM.
  • Familiarity with simulation tools (VCS, Questa, etc.).
  • Knowledge of Linux/Unix environments.
  • Experience with Git or other version control system.

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