Design, develop, and optimize GCC and LLVM compilers for RISC-V and AI architectures, collaborating across hardware and software teams to enhance performance.

Design and simulate high-speed interconnects, collaborate with teams on specifications, troubleshoot issues, and support post-silicon bring-up and validation.

As a Logistics Specialist, manage outbound shipments, order fulfillment, and collaborate with teams to ensure timely delivery and compliance.

The PCB Layout Engineer will design multi-layer PCB layouts for high-performance computing and AI hardware, ensuring specifications for mass production. Responsibilities include routing high-speed interfaces and collaborating with cross-functional teams to meet design requirements.

Develop and optimize distributed software systems for AI and HPC clusters, focusing on inter-node communication and scalable architectures.

The Package Design Engineer will focus on Organic and Advanced 2.5D/3D chiplet packaging, optimize routing, and improve design processes through automation and cross-functional collaboration.

The Sr. SoC Design Verification Engineer ensures functionality and performance of AI/ML accelerator chiplets by designing and executing test plans and collaborating with technical teams.

The engineer will focus on pre-silicon verification of DFD logic in AI SoCs, developing environments, analyzing coverage gaps, and automating testing flows.

As a DevRel Engineer, you will create web tools and demos for developers, integrating AI features and improving UX alongside marketing efforts.

Develop and optimize low-level infrastructure interfacing Tenstorrent hardware: build libraries/APIs for inter-node communication, improve system-level performance and scalability, support hardware bring-up, testing and deployments, and integrate components with internal runtimes and tools.

As an AI Processor IP Product Engineer, you'll facilitate customer integration of AI processors into SoCs, ensuring performance and market readiness. Responsibilities include technical support and debugging complex systems.

As Director, Systems & Solutions, lead the deployment and optimization of AI compute systems, focusing on hardware technologies and customer engagement to enhance performance and usability.

As a Sr. RTL Design Engineer, you'll implement parameterized RTL designs, optimize for performance, power, and area, and collaborate with teams to enhance AI hardware efficiency.

The Risc-V Architect will analyze AI workloads, design custom RISC-V cores, and lead the architecture efforts at Tenstorrent, improving CPU performance.

The role involves advancing ASIC design methodologies, improving design quality and productivity through automation, and collaborating across teams to ensure efficient and scalable design flows.

As an AI Performance Architect, you will analyze and optimize AI workloads on Tensix architecture, linking architecture with software and hardware to enhance efficiency and scalability.

Lead the design and development of advanced System-on-Chip architectures for AI and automotive markets, managing full SoC lifecycle from concept to production.

As a Power Architect at Tenstorrent, you'll drive architectural strategy to optimize power across AI compute systems, using advanced estimation tools and modeling techniques.

The Staff Design Verification Engineer will ensure quality and reliability of digital designs through verification methodologies, defining strategies, and leading teams in validating complex designs.

Lead the architecture, implementation, and performance tuning of high-performance on-chip interconnects for AI workloads. Mentor junior engineers and contribute to validation and optimization processes.