Lead deep-learning inference optimization for edge/autonomous systems: analyze models to operator/kernel level, benchmark and deploy TensorRT/compiler solutions on Jetson/DRIVE/ARM/GPU platforms, collaborate with compiler/runtime/hardware teams, and engage partners to deliver production-ready performance improvements.

Verify design and implementation of GPUs, develop verification infrastructure, collaborate with architectural teams, and ensure correctness of designs in a tech-focused environment.

The role involves building AI inference systems, optimizing GPU performance, and developing benchmarking methodologies for large-scale deployments.

The role involves developing algorithms for inference optimization, building compiler components, and collaborating across teams to enhance performance on NVIDIA platforms.

NVIDIA seeks a Senior ASIC Infrastructure Engineer to develop AI/ML applications for chip design, collaborating with hardware teams and creating innovative tools.

Develop an AI Platform for efficient training and inference of large scale models, focusing on scheduling and resource management.

The Senior Memory Controller Verification Engineer will develop verification infrastructure, drive test plan execution, ensure coverage, and support post-silicon verification and debug for complex SoC designs.

The Senior ASIC Verification Engineer will verify high-speed coherent interconnect designs, develop verification environments, and collaborate with teams to ensure correctness of designs in a technology-focused environment.

Drive AI-enabled ASIC development methodology by identifying cross-stage bottlenecks, building data pipelines and metrics, creating automation and AI models, mentoring engineers, and evaluating advances in AI and EDA to improve predictability, convergence, and cycle time.

You will verify ASIC design implementation, develop verification infrastructure, optimize verification flows, and collaborate with teams on advanced methodologies.

As a Senior Formal Verification Engineer, you will verify ASICs using formal methods, collaborate multi-functionally, lead methodology enhancements, and mentor junior engineers while ensuring compliance and correctness.

As a Senior ASIC Design Engineer, you'll implement high-performance RTL, analyze architectural trade-offs, and collaborate across teams to deliver cutting-edge designs.