The Senior ASIC Verification Designer will lead complex ASIC verification projects, create UVM-based environments, develop test plans, and ensure design quality through rigorous verification methodologies.

The Senior Hardware Designer will develop system and board designs, conduct simulations, and mentor junior designers while ensuring quality standards are met.

The Project Manager oversees multiple concurrent projects, coordinates teams, manages budgets and schedules, and ensures project delivery. Responsibilities include customer communication, resource management, and process improvement.

Seeking a Senior FPGA Designer with 8+ years of experience in RTL/Verilog/VHDL on FPGAs, focusing on complex designs, customer interactions, and technical project support.